fetch stage

fetch stage
стадия (фаза, этап) выборки - см. fetch cycle

Англо-русский толковый словарь терминов и сокращений по ВТ, Интернету и программированию. . 1998-2007.

Игры ⚽ Нужна курсовая?

Смотреть что такое "fetch stage" в других словарях:

  • Classic RISC pipeline — In the history of computer hardware, some early reduced instruction set computer central processing units (RISC CPUs) used a very similar architectural solution, now called a classic RISC pipeline. Those CPUs were: MIPS, SPARC, Motorola 88000,… …   Wikipedia

  • Instruction pipeline — Pipelining redirects here. For HTTP pipelining, see HTTP pipelining. Basic five stage pipeline in a RISC machine (IF = Instruction Fetch, ID = Instruction Decode, EX = Execute, MEM = Memory access, WB = Register write back). In the fourth clock… …   Wikipedia

  • Конвейер (процессоры)/Перевод — Пожалуйста, не удаляйте эту статью! В данный момент в ней идет работа по переводу основной английской версии для замены кошмарной русской. После завершения работы я объединю получившуюся статью с имеющейся русской версией. Простой пятиуровневый… …   Википедия

  • Hazard (computer architecture) — Hazards are problems with the instruction pipeline in central processing unit (CPU) microarchitectures that potentially result in incorrect computation. There are typically three types of hazards: data hazards structural hazards control hazards… …   Wikipedia

  • CPU cache — Cache memory redirects here. For the general use, see cache. A CPU cache is a cache used by the central processing unit of a computer to reduce the average time to access memory. The cache is a smaller, faster memory which stores copies of the… …   Wikipedia

  • Compiler optimization — is the process of tuning the output of a compiler to minimize or maximize some attributes of an executable computer program. The most common requirement is to minimize the time taken to execute a program; a less common one is to minimize the… …   Wikipedia

  • PA-8000 — HP PA 8000. The PA 8000 (PCX U), code named Onyx, is a microprocessor developed and fabricated by Hewlett Packard (HP) that implemented the PA RISC 2.0 instruction set architecture (ISA).[1] It was a completely new design with no circuitr …   Wikipedia

  • Central processing unit — CPU redirects here. For other uses, see CPU (disambiguation). An Intel 80486DX2 CPU from above An Intel 80486DX2 from below …   Wikipedia

  • computer — computerlike, adj. /keuhm pyooh teuhr/, n. 1. Also called processor. an electronic device designed to accept data, perform prescribed mathematical and logical operations at high speed, and display the results of these operations. Cf. analog… …   Universalium

  • Operation USA — (aka Operation California, In.) Founder(s) Richard M. Walden Founded 1979, with its California incorporation date in May 1980 Location Los Angeles, California Key people Ric …   Wikipedia

  • lake — lake1 /layk/, n. 1. a body of fresh or salt water of considerable size, surrounded by land. 2. any similar body or pool of other liquid, as oil. 3. (go) jump in the lake, (used as an exclamation of dismissal or impatience.) [bef. 1000; ME lak(e) …   Universalium


Поделиться ссылкой на выделенное

Прямая ссылка:
Нажмите правой клавишей мыши и выберите «Копировать ссылку»